Trusted software execution, prevention of code and data tampering, authentication, and providing a secure environment for software are some of the most important security challenges in the design of embedded systems. This short paper evaluates the performance of a hardware/software co-design methodology for embedded software protection. Secure software is created using a secure compiler that inserts hidden codes into the executable code which are then validated dynamically during execution by a reconfigurable hardware component constructed from Field Programmable Gate Array (FPGA) technology. While the overall approach has been described in other papers, this paper focuses on security-performance tradeoffs and the effect of using compiler optimizations in such an approach. Our results show that the approach provides software protection with modest performance penalty and hardware overhead. © Springer-Verlag Berlin Heidelberg 2005.
CITATION STYLE
Mohan, K., Narahari, B., Simha, R., Ott, P., Choudhary, A., & Zambreno, J. (2005). Performance study of a compiler/hardware approach to embedded systems security. In Lecture Notes in Computer Science (Vol. 3495, pp. 543–548). Springer Verlag. https://doi.org/10.1007/11427995_56
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