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Formally-based design evaluation

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (2001) 2144 104-109
DOI: 10.1007/3-540-44798-9_9
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Abstract

The paper investigates specification, verification and test generation for synchronous and asynchronous circuits. The approach is called Dill (Digital Logic in Lotos – the ISO Language Of Temporal Ordering Specification). Relations for (strong) conformance are defined to verify a design specification against a high-level specification. Tools have been developed for automated testing and verification of conformance between an implementation and its specification.

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Turner, K. J., & He, J. (2001). Formally-based design evaluation. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 2144, pp. 104–109). Springer Verlag. https://doi.org/10.1007/3-540-44798-9_9

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