GPU-based parallelization of topological sorting

Abstract

Topological sort referred to as topo sort or topological ordering is defined as constraint-based ordering of nodes (vertices) of graph G or DAG (Directed Acyclic Graph). In other words, it gives a linearized order of graph nodes describing the relationship between the graph vertices. Many applications of various fields in computer science require a constraint-based ordering of tasks and, thus, topological sorting holds a big place of importance for many applications like semantic analysis in compiler design, Gantt chart generation in software project management and many more. In this paper, a parallel version of this ordering algorithm over CUDA (Compute Unified Device Architecture) has been discussed by identifying an approach to process-independent portions of the graph simultaneously for load flow analysis over radial distribution networks. The serial implementation of topological sort has been first discussed followed by its implementation on thread-block architecture of CUDA modifying the serial algorithm. Finally, the efficiency of this parallel version of topo sort has been investigated on various structures of graph modeled from radial distribution networks and has been reported.