Abstract
Modular multiplication is fundamental to several public-key cryptography systems such as the RSA encryption system. It is also the most dominant part of the computation performed in such systems. The operation is time consuming for large operands. This paper examines the characteristics of yet another architecture to implement modular multiplication. An experimental modular multiplier prototype is described in VHDL and simulated. The simulation results are presented. © Springer-Verlag Berlin Heidelberg 2003.
Cite
CITATION STYLE
Nedjah, N., & De Macedo Mourelle, L. (2003). Fast hardware of Booth-Barrett’s modular multiplication for efficient cryptosystems. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2869, 27–34. https://doi.org/10.1007/978-3-540-39737-3_4
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