This paper reports on a Deep-Level Transient Spectroscopy (DLTS) study of the electrically active defects in ~100 nm Si:C stressors, formed by chemical vapor deposition on p-type Czochralski silicon substrates. In addition, the impact of a post-deposition Rapid Thermal Annealing (RTA) at 850◦C on the DLT-spectra is investigated. It is shown that close to the surface at least two types of hole traps are present: one kind exhibiting slow hole capture, which may have a partial extended defect nature and a second type of hole trap behaving like a point defect. RTA increases the concentration of both hole traps and, in addition, introduces a point defect at EV + 0.35 eV in the depletion region of the silicon substrate at some distance from the Si:C epi layer. This level most likely corresponds with CiOi-related centers. Finally, a negative feature is found systematically for larger reverse bias pulses, which could point to a response of trap states at the Si:C/silicon hetero-interface.
CITATION STYLE
Simoen, E., Dhayalan, S. K., Hikavyy, A., Loo, R., Rosseel, E., Vrielinck, H., & Lauwaert, J. (2017). Carbon-Related Defects in Si:C/Silicon Heterostructures Assessed by Deep-Level Transient Spectroscopy. ECS Journal of Solid State Science and Technology, 6(5), P284–P289. https://doi.org/10.1149/2.0211705jss
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