Parallel-prefix adders (also known as carry tree adders) are known to have the best Performance in VLSI designs. The Design of the three types of carry-tree adders namely Kogge-Stone, sparse Kogge-Stone, and spanning carry look ahead adder is done and compares them to the simple Ripple Carry Adder (RCA). These designs of varied bit-widths were implemented on a Xilinx Spartan 3E FPGA and power measurements were made with LIBRO. Due to the presence of a fast carry-chain, the RCA designs exhibit better delay performance up to 128 bits. The carry-tree adders are expected to have a speed advantage over the RCA as bit widths approach 256. An Efficient FFT is designed by implementing the adder which consumes low power is replaced in the adder module of FFT. © 2013 Springer Science+Business Media New York.
CITATION STYLE
Sreenathkashyap, S. (2013). High through-put VLSI architecture for FFT computation. In Lecture Notes in Electrical Engineering (Vol. 150 LNEE, pp. 3–13). https://doi.org/10.1007/978-1-4614-3363-7_1
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