Application of hierarchical systems technology in design and testing of circuit boards

Abstract

The paper shows the possibility of Hierarchical Systems (HS) technology use in the tasks of Printed Circuit Boards (PCB) geometric design and interconnections (conductive pathways) quality testing. It gives formal description of the PCB construction and both the design and testing processes. Presented HS technology allows easy correction of interconnections topology of PCB, the mechanism of information aggregation permits reduction of computer memory, availability of coordinator allows performing decision making tasks on its layers. Possibility of HS technology realization using standard computer program and technical means is shown in the work as well. © 2013 Springer-Verlag Berlin Heidelberg.