A loop parallelization algorithm for HPF compilers

Abstract

This paper presents a formalized loop parallelization algorithm for effectively extracting parallelism from data to be allocated to processors with array decomposition directives, in languages such as High Performance Fortran (HPF). We define a communication dependence vector that shows data dependence among processors, and use it in our algorithm to formalize and unify the detection of vector prefetch communication and vector pipeline communication for loop parallelization. The paper also presents a method, based on our algorithm for generating vector communications. We implemented the algorithm in our HPF compiler and carried out experiments with two applications on an IBM RS/6000 Scalable POWERparallel System.