This work investigates the intrinsic characteristics of multilayer WSe2 field effect transistors (FETs) by analysing Pulsed I-V (PIV) and DC characteristics measured at various temperatures. In DC measurement, unwanted charge trapping due to the gate bias stress results in I-V curves different from the intrinsic characteristic. However, PIV reduces the effect of gate bias stress so that intrinsic characteristic of WSe2 FETs is obtained. The parameters such as hysteresis, field effect mobility (μeff), subthreshold slope (SS), and threshold voltage (Vth) measured by PIV are significantly different from those obtained by DC measurement. In PIV results, the hysteresis is considerably reduced compared with DC measurement, because the charge trapping effect is significantly reduced. With increasing temperature, the field effect mobility (μeff) and subthreshold swing (SS) are deteriorated, and threshold voltage (Vth) decreases.
CITATION STYLE
Lee, S. T., Cho, I. T., Kang, W. M., Park, B. G., & Lee, J. H. (2016, December 1). Accurate extraction of WSe2 fets parameters by using pulsed I-V method at various temperatures. Nano Convergence. Korea Nano Technology Research Society. https://doi.org/10.1186/s40580-016-0091-9
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