Power optimization techniques for segmented digital displays

Abstract

A number of power optimization techniques for portable electronic systems have been proposed earlier based on instruction-level characterization, compiler optimizations, source-level transformations, memory management schemes at the software level or dynamic power management and voltage scaling at the hardware level. However, reducing the power dissipation in embedded system peripherals namely LCDs, flash memory etc. also helps in improving the battery life. We propose some of these techniques with reference to segmented digital LCDs based on various control parameters like contrast ratio(pixel darkness), frame frequency, multiplexed mode of operation with significant power savings without compromising on the display quality. © 2011 Springer-Verlag.