Ant colony algorithm based scheduling with lot-sizing for printed circuit board assembly shop

Abstract

This paper investigates a multi-stage hybrid flow shop scheduling problem in a real-world printed circuit board (PCB) assembly shop. Some distinct characteristics such as calendar constraints, sequence-dependent setup times, unrelated parallel machines and stage skipping are taken into account. Besides, lot-sizing is introduced to split an order of PCBs into a number of smaller sub-lots to improve the utilization of the assembly lines. This article develops an effective hierarchical approach to reduce the complexity of such a complicated PCB scheduling problem by decomposing it into two highly coupled sub-problems of job sequencing and batch scheduling with lot-sizing. A two-stage ant colony algorithm with lot-sizing is proposed to evolve best results for makespan criterion. Extensive computational experiments have been conducted to compare the performance with two other algorithms. The results demonstrate that the proposed two-stage ant colony algorithm with lot-sizing is competitive in terms of computational result, computational time and stability.