Impact of address generation on multimedia embedded VLIW processors

Abstract

Embedded multimedia devices need to be more and more energy efficient while dealing with applications of increasing complexity. These applications are characterised by having complex array index manipulation, a large number of data accesses and require high performant specific computation at low energy consumption due to battery life. In many cases, the principal component of such systems is a programmable processor, and often, a Very Large Instruction Word (VLIW) processor (alone or integrated with other processor cores). A VLIW processor seems a good solution providing enough performance at low power with sufficient programmability but optimising the access to the data is a crucial issue for the success of those devices. Some modern embedded architectures include a dedicated unit that works in parallel with the central computing elements ensuring efficient feed and storage of the data from/to the data path: the Address Generation Unit. In this paper, we present an experimental work that shows, on real and complete applications and benchmarks, the impact of address generation in VLIW-like processor architectures. We see how address generation in multimedia embedded systems has a very significant contribution to the energy budget and a careful analysis an optimisation is needed to extend battery life as much as possible while keeping enough performance to satisfy the quality of service requirements. We also present the framework used to create and evaluate the impact of address generation on the overall system.