Scheduling architecture-supported regions in parallel programs

Abstract

Current multicore system technology enables implementation of particular program functions like library operations, special functions generation, optimized data search etc. using dedicated computing units to increase overall program performance. A parallel system can be equipped with a set of such units to speed up execution of applications, which use such functionality. To properly model and schedule programs using such functions running on a dedicated hardware, a proper program representation must be introduced. The paper presents special scheduling algorithm for programs represented as graphs, based on a modified ETF heuristics. The algorithm is meant for a modular architecture composed of many CMP modules interconnected by a global data communication network. The assumed architecture of dedicated CMP modules enables personalized fully synchronous program execution, which uses communication on the fly to strongly reduce inter-core communication overheads. © 2012 Springer-Verlag.