Today, RSA is one of the most popular public-key crypto-system in various applications. In this paper, we present a high-speed RSA crypto-processor with modified radix-4 Montgomery multiplication algorithm and Chinese Remainder Theorem (CRT). Our design takes 0.84M clock cycles for a 1024-bit modular exponentiation and 0.25M clock cycles for two 512-bit exponentiations. Using 0.18 um standard cell library, the processor achieves 365Kbps for a 1024-bit exponentiation and 1,233Kbps for two 512-bit exponentiations at a 300MHz clock rate. For the high performance RSA crypto-system, the processor can also execute modular reduction, which is essential for calculating the Montgomery mapping constant and the modularly reduced ciphertext in CRT technique. © Springer-Verlag Berlin Heidelberg 2006.
CITATION STYLE
Koo, B., Lee, D., Ryu, G., Chang, T., & Lee, S. (2006). High-speed RSA crypto-processor with radix-4 modular multiplication and Chinese remainder theorem. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4296 LNCS, pp. 81–93). Springer Verlag. https://doi.org/10.1007/11927587_9
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