A new LSI layout verification system which compares two circuits is described. One is extracted from LSI layout, and the other is an original circuit diagram. This system is also capable of giving layout error information to designers. In particular, this system is applicable to bipolar linear LSIs containing a variety of electrical elements.
CITATION STYLE
Sakata, T., & Kishimoto, A. (1985). CIRCUIT COMPARISON SYSTEM FOR BIPOLAR LINEAR LSI. In Proceedings - Design Automation Conference (pp. 429–434). IEEE. https://doi.org/10.1145/317825.317923
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