Abstract
VS (Virtual Supervisor) Diagrams, defined from the FPM (Finite Positions Machines) framework, are used to model, analyze and validate automated manufacturing systems and they are obtained, in a practical way, from the PLC (Programmable Logic Controller) signals. This current paper presents a neural network architecture in order to identify that type of diagrams. It is made up of a supervised Hebb neural network cascade linked to a recurrent Hopfield network. © 2009 Springer Berlin Heidelberg.
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Gómez, D., Moya, E. J., Baeyens, E., & Cárdenas, C. (2009). VS-diagrams identification and classification using neural networks. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5518 LNCS, pp. 240–243). https://doi.org/10.1007/978-3-642-02481-8_34
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