A 12-bit Hybrid DAC with Swing Reduced Driver

  • Suthaskumar M
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Abstract

This work presents a glitch improved design of a 12-bit fully differential current source resistor string hybrid digital-to-analog converter (DAC) achieved by incorporating a swing reduced driver (SRD) circuit in the existing design. The results show that this design achieves a 13.26 % improvement in glitch reduction in comparison with the original version. The physical layout of the glitch improved design DAC is accomplished within a design area of 489.4 μm x 117 μm or 57260μm^2.

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APA

Suthaskumar, M. (2013). A 12-bit Hybrid DAC with Swing Reduced Driver. IOSR Journal of VLSI and Signal Processing, 3(2), 35–39. https://doi.org/10.9790/4200-0323539

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