We present a novel FPGA-accelerated architecture for fast collision detection among rigid bodies. This paper describes the design of the hardware architecture for several primitive intersection testing components implemented on a multi-FPGA Xilinx Virtex-II prototyping system. We focus on the acceleration of ray-triangle intersection operation which is the one of the most important operations in various applications such as collision detection and ray tracing. Our implementation result is a hardware-accelerated ray-triangle intersection engine that is capable of out-performing a 2.8 GHz Xeon processor, running a well-known high performance software ray-triangle intersection algorithm, by up to a factor of seventy. In addition, we demonstrate that the proposed approach could prove to be faster than current GPU-based algorithms as well as CPU based algorithms for ray-triangle intersection. © Springer-Verlag Berlin Heidelberg 2007.
CITATION STYLE
Kim, S. S., Nam, S. W., & Lee, I. H. (2007). Fast ray-triangle intersection computation using reconfigurable hardware. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4418 LNCS, pp. 70–81). Springer Verlag. https://doi.org/10.1007/978-3-540-71457-6_7
Mendeley helps you to discover research relevant for your work.