Flash translation layer for solid state drives

Abstract

Solid State Drives organize NAND flash memory in m-way & n-channel structure in order to increase the read/write throughput and the capacity. In m-way & n-channel structure, the basic read/write unit is usually multiples of physical page size. However, the influence of the read/write unit size on the performance has not been sufficiently studied. In this work, we investigate the influence of the read/write unit size on the representative FTL schemes. The results through a trace-driven simulation show that the optimal point is in the middle of small unit and large unit. Too large read/write unit hurts the performance seriously because small sized write requests occupy a considerable portion in windows PC. Especially, the performance of the page mapping scheme steeply decreases by large clustered page when the utilization is high. © 2012 Springer-Verlag GmbH.