Novel Reversible ALU Architecture Using DSG Gate

Abstract

In the era of giant-scale integration and technology advancement, it will not be economically feasible to cope up as power dissipation is a fundamental threat to the technology. The impending end of Moore’s law is motivating to seek for better technology. Reversible logic provides dramatic improvements in energy efficiency and proves to be a promising solution for the future. The most promising application of reversible logic will be for smart and massive quantum computing applications in near future. Implementing reversible logic is an intractable research problem, but many researchers have chosen this path to save energy and decided to blaze into this new trail of technology. The arithmetic and logic unit (ALU) is command center of all computing environment. The most important aspects of ALU like number of operations, ancillary inputs, garbage outputs and quantum cost are mostly discussed to compare whether any reversible logic-based ALU is more efficient over other. This paper presents a novel reversible ALU where these aspects have been examined, and optimization metrics comparison shows the significant improvements over existing designs. The proposed ALU design is coded in Verilog HDL, synthesized and simulated using electronic design automation (EDA) tool—Xilinx ISE design suit 14.2. RCViewer + tool has been used to validate quantum cost of proposed design.