Linear algebra calculations on the BBN TC2000

Abstract

The BBN TC2000 is a distributed-memory multiprocessor with up to 512 RISC processor nodes. The originality of the BBN TC2000 comes from its interconnection network (Butterfly switch) and from its globally addressable memory. We evaluate, in this paper, the impact of the memory hierarchy of the TC2000 on the design of algorithms for linear algebra. On shared memory multiprocessor computers, block algorithms have been introduced for efficiency. We study here the potential and the limitations of such approaches on the BBN TC2000. We describe the implementation of Level 3 BLAS and examine the performance of some of the LAPACK routines. We also study the factorization of sparse matrices based on a multifrontal approach. The ideas introduced for the parallelization of full linear algebra codes are applied to the sparse case. We discuss and illustrate the limitations of this approach in sparse multi-frontal factorization. We show that the speed-ups obtained on the class of methods presented here are comparable to those obtained on more classical shared memory computers.