A compressive sensing algorithm for many-core architectures

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Abstract

This paper describes a parallel algorithm for solving the l 1-compressive sensing problem. Its design takes advantage of shared memory, vectorized, parallel and many-core microprocessors such as Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Experiments are conducted on these architectures, showing evidence of the efficiency of our approach. © 2010 Springer-Verlag.

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Borghi, A., Darbon, J., Peyronnet, S., Chan, T. F., & Osher, S. (2010). A compressive sensing algorithm for many-core architectures. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 6454 LNCS, pp. 678–686). Springer Verlag. https://doi.org/10.1007/978-3-642-17274-8_66

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