Material engineering for silicon tunnel field-effect transistors: Isoelectronic trap technology

Abstract

The tunnel field-effect transistor (TFET) is one of the candidates replacing conventional metal-oxide-semiconductor field-effect transistors to realize low-power-consumption large-scale integration (LSI). The most significant issue in the practical application of TFETs concerns their low tunneling current. Si is an indirect-gap material having a low band-to-band tunneling probability and is not favored for the channel. However, a new technology to enhance tunneling current in Si-TFETs utilizing the isoelectronic trap (IET) technology was recently proposed. IET technology provides a new approach to realize low-power-consumption LSIs with TFETs. The present paper reviews the state-of-the-art research and future prospects of Si-TFETs with IET technology.