An fpga based novel digital controller for dstatcom to enhance power quality in distribution system

Abstract

This paper proposes an FPGA based all-on-chip novel digital controller for DSTATCOM to compensate harmonics and reactive power existing in a power distribution system. The proposed methodology extracts reference current by considering an instantaneous symmetrical component active power (ISCAP) theory based phase delay compensation (PDC) approach. The proposed technique comprises positive sequence detector, PI-controller, low-pass filters (LPF) and hysteresis current controller (HCC). All these components are configured on high speed, low cost field programmable gate arrays (FPGA) hardware resources intended to mitigate harmonics and compensate reactive power in a power distribution network. Very high speed hardware description language (VHDL) implementation for each module are produced through a system generator and implemented on a SPARTAN-3 XC3S5000 FPGA chip through RT-XSG toolbox in Opal-RT platform. The functioning of the proposed controller is demonstrated via VHDL test bench, simulation and real-time experimental results concerning total harmonic distortion (THD) and power factor correction in steady state as well as transient condition.