MCP detector read out with a bare quad Timepix at kilohertz frame rates

Abstract

The existing Berkeley neutron sensitive MCP/Timepix hybrid detector has been very successful at demonstrating energy resolved spatial imaging with a single Timepix ASIC read out at a ∼ 30 Hz frame rate where each neutron's position and time (energy) is determined (X,Y,E). By increasing the detector format using a quad arrangement of Timepix readouts and increasing the frame rate to 1 kHz, we can increase our total event throughput by a factor of 120, thereby taking full advantage of the high fluxes of modern pulsed neutron sources (106 n cm-2 s-1). The key to this conversion is a new design for the ASIC readout, called the Berkeley Quad Timepix detector, consisting of 3 major subsystems. The first is a quad (2 × 2) bare Timepix ASIC board mounted directly behind the neutron sensitive MCPs in a hermetic vacuum enclosure with a sapphire window. The data from the Timepix ASICs flow to the second subsystem called the Interface board whose field programmable gate array (FPGA) rearranges and converts the digital bit stream to LVDS logic levels before sending downstream to the third subsystem, the Roach board. The Roach board is also FPGA based, and takes the data from all the ASICs and analyses the frames to extract information on the input events to pass on to the host PC. This paper describes in detail the hardware and firmware designs to accomplish this task. © 2011 IOP Publishing Ltd and SISSA.