Verification using tabled logic programming

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Abstract

The LMC project aims to advance the state of the art of system specification and verification using the latest developments in logic programming technology [CDD+98]. Initially the project was focussed on developing an efficient model checker, called XMC [RRR+97], for value-passing CCS [Mil89] and the modal mu-calculus [Koz83] based on the XSB logic programming system [XSB00]. We developed an optimizing compiler to translate specifications in a dialect of value-passing CCS to compact labeled transition systems [DR99], improving verification performance several fold. The core principles of this translation have been recently incorporated in SPIN [Hol97] showing similar gains in performance [Hol99]. The XMC system can be downloaded from http://www.cs.sunysb.edu/~lmc. More recently we have developed - techniques using logic-program transformations [TS84, PP99, RKRR99] for verifying parameterized systems, i.e., infinite families of finite-state systems [RKR+00]; - a proof-tree viewer for justifying successful or failed verification runs for branching-time properties [RRR00]; - a symbolic bisimulation checker (based on the work of [HL95]) for value-passing systems [MRRV00]; - model checkers for • real-time systems [DRS00] based loosely on the local model checking algorithm of [SS95]; • LTL with actions [PR00] based on GCTL of [BCG00] and the on-the-fly model checking algorithm in [BCG95]; In this tutorial, we describe the XMC system as well as the above developments. In addition, we outline the research efforts of the verification and the logic programming community that have been instrumental in these developments. © Springer-Verlag Berlin Heidelberg 2000.

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APA

Ramakrishnan, C. R. (2000). Verification using tabled logic programming. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 1877 LNCS, pp. 89–91). Springer Verlag. https://doi.org/10.1007/3-540-44618-4_8

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