Wavelet transform architectures: A system level review

Abstract

In this paper we review the architectures designed for wavelet transforms, with the purpose to highlight their suitability for inclusion in codec systems. Indeed, common VLSI cost functions (such as AT2) are insufficient to evaluate architectures for compression. At the system level, quantization and coding have processing requirements that must be taken into account when designing the transform engine. The hierarchical structure of wavelet transform allows to use "pyramid" algorithms that optimize latency and processor utilization; on-line solutions try to minimize buffering memory. Such approaches can be substituted with more standard ones, if data reordering is mandatory to apply a good quantization strategy. An upcoming commercial solution offers a sound comparison paradigm.