Design of conservative gate and their novel application in median filtering in emerging QCA nanocircuit

Abstract

In this era of emerging technology, fault-tolerant logic is applied for circuit design. As the deep submicron and scaling, a number of pitfalls are the faces of the CMOS technology. So a lot of constraints related to CMOS have shorted with the quantum-dot cellular automata (QCA) technology. In this work, a new parity conservative gate referred as parity-QCA (P-QCA) is proposed. The gate is simulated with QCADesigner and compared with existing parity preserving logic gates. By the comparative outcomes, it is found that the proposed design achieved higher efficiency as compared to the counterparts. We achieved 100% stuck-at fault coverage.