Design of Efficient Complex Gate using 45nm Technology

Abstract

In this paper, we designed complex gate which is having very good performance in terms of delay. This is achieved by increasing threshold voltage. The reduced delay and its percentage variation with respect to threshold voltage is shown below in the result analysis. Increasing of threshold voltage not only reduces delay but indirectly reduces leakage power consumption. Now-a-days Efficient Complex Gate using 45nm technology is preferable because of its delay and power.