VLSI physical design: From graph partitioning to timing closure

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Abstract

The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings.

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Kahng, A. B., Lienig, J., Markov, I. L., & Hu, J. (2022). VLSI physical design: From graph partitioning to timing closure. VLSI Physical Design: From Graph Partitioning to Timing Closure (pp. 1–317). Springer International Publishing. https://doi.org/10.1007/978-3-030-96415-3

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