Low-Resistance Room-Temperature Interconnection Technique for Bonding Fine Pitch Bumps

Abstract

In this work, we demonstrate on a new interconnection technology which can be used for bonding Flip-Chips with 5-µm-Bumps and fine pitches <5 µm. In this technology, the bumps on both joint partners are coated with metallic nanowires (in most cases copper, in rare cases gold), through an in situ electrochemical deposition process, the so-called NanoWiring process. The diameter of the wires can be adjusted between 30 and 4000 nm, and their length is ranged from 4 to 50 µm. The process is scaled up for 12 inch wafers. The bonding process can be performed directly at wafer level or also at Flip-Chip level. The nanowires overcome the dicing step. The diced chips can be bonded by adjusting and pressing the NanoWired bumps together at room temperature, using the standard bonding devices. The required bonding forces range from 5 to 50 MPa for flip chips, LEDs and sensors. The bonding with nanowires, the so-called KlettWelding, can be explained by diffusion of the nanowires in each other under compression and weaving of the wires as well. The measured shear strength of these connections yields 15-24 MPa. The very large achieved Surface/Volume quotient of NanoWired surface causes this strength. For a better performance, a prior copper oxide reducing step for the copper NanoWires is needed. This can be done by using standard processes like forming gas plasma or formic acid vapor. By heating during the pressing process up to 230 °C, the shear strength increases to 60 MPa. The nanowired interconnections have an electrical conduction in the range of bulk metal, because of their pure metallic nature. Beside microelectronic applications, the bonding of larger metallic plates like aluminium, copper, steel and also flexible polymers, glass, silicon and ceramics are also enabled.