Design, analysis, and testing of low-voltage CMOS OTA

Abstract

Design, simulation, and testing of a two-stage CMOS operational transconductance amplifier by 0.18 µm complementary metal oxide semiconductor (CMOS) technology are described in this paper. The operational transconductance amplifier has ±1 V power supply and 113 µA input bias current. The basic parameters of the operational transconductance amplifier (OTA) like gain, load capacitance, slew rate, settling time, power consumption, gain bandwidth, input common mode range, output voltage swing, and propagation delay are explored. Simulation results show that the proposed amplifier has low-power consumption (1.1 mW) and propagation delay (1.1 ns) with the improved performance, high gain of 59 DB, and gain bandwidth (GBW) of 29 MHz. The proposed circuits are also tested using quiescent power supply current (IDDQ) testing and results show that more than 85% fault are detected. Open and short faults are introduced in the proposed circuit using fault injection transistor (FIT). PSPICE is used to simulate the results.