Physical and Electrical Characterisation of3C-SiC and 4H-SiC for Power Semiconductor Device Applications

Abstract

This paper brings together a host of physical and electrical characterization aimed at overcoming the main issues that are hampering the widespread uptake of silicon carbide power device technology. We present three major obstacles and subsequently provide analysis and possible solutions. The first is reducing wafer bow via a novel with 3C-SiC epitaxial process above wafer bonded poly silicon carbide/ silicon structures. Next thermal gate oxidation of silicon carbide and corresponding interface quality as a function of flow rate is analysed. We show that interface trap density is best for minimized oxygen How rates. Finally we examine the robustness of silicon carbide ohmic contacts to p-type material, demonstrating specific contact resistivities that are close to the state of the art.