Method of Recurrent Neural Network Hardware Implementation

Abstract

Real-time data processing using recurrent neural networks (NN) is non-trivial task, due to tight timing constraints requirements. It is proposed hardware implementation of recurrent echo state NN (ESN) on the basis of the Cyclone IV FPGA. Advantages of the hardware implementation are high computational parallelism and low power consumption. To solve the problem of neuron weight storage, it is proposed to reduce the space of their values to a set of integers of low capacity. It was determined that the proposed NN model decreases need in hardware resources for the reservoir implementation in 2–3 orders of magnitude in comparison with conventional NN. Modeling results, implementation and testing of the FPGA project confirmed effectiveness of the proposed integer NN in hardware applications #CSOC1120.