Implementing converters in FPLD

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Abstract

This paper describes a new technology to implement AD and DA converters using digital FPLD and few external components. To explain this technology we present two example designs; a new broadband modem mixed-signal front end (MxFE) and a narrow band modem both for Power Line Communications (PLC). The key point of this technology is the use of digital output as voltage or current source and passive RLC network to implement continuous time multi-bit sigma-delta converter architecture. The DAC uses mismatch-shaping and multi-bit modulator. The ADC is high-order single-bit continuous time modulator. The quantizer used to implement the ADC is a low cost ultrafast single supply comparator and few external components. © Springer-Verlag Berlin Heidelberg 2002.

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APA

Sanz, A., García-Nicolás, J. I., & Urriza, I. (2002). Implementing converters in FPLD. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2438, 966–975. https://doi.org/10.1007/3-540-46117-5_99

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