Memristive Crossbar Arrays for Storage and Computing Applications

Abstract

Crossbar arrays based on two-terminal resistive switches have been proposed as a leading candidate for future memory and logic applications. Here we demonstrate a high-density, fully operational hybrid crossbar/CMOS system composed of a transistor-and diode-less memristor crossbar array vertically integrated on top of a CMOS chip by taking advantage of the intrinsic nonlinear characteristics of the memristor element. The hybrid crossbar/CMOS system can reliably store complex binary and multilevel 1600 pixel bitmap images using a new programming scheme. T he crossbar resistive memory array, in which the storage elements are two-terminal resistive switches (sometimes termed memristors) forming a passive interconnected network, and hybrid crossbar/CMOS systems have been identified as a leading candidate for future memory and logic applications. 1−11 However, a fundamental problem for such a passive array is that 'sneak paths,' which correspond to parasitic current paths that bypass the target storage element, can be formed (Figure S1, Supporting Information) and cause the array to be nonfunc-tional. To suppress current flowing through sneak paths, a memory cell in the crossbar memory essentially needs two components: a memory switching element which offers data storage and a "select device" which regulates current flow. Several reports have shown that it is possible to scale the switching element down to nanometer scale with excellent performance in terms of speed, retention, and endurance. 12−15 On the other hand, obtaining a suitable select device that can be integrated in a crossbar array has become a significant challenge in resistive memory research, since diodes based on crystalline materials are not suitable for low-temperature fabrication, while those based on low-temperature materials suffer from performance and reliability issues. 16−18 Due to these difficulties, even though a number of approaches have been proposed to address the sneak path problem using diodes as the select device or using novel complementary cell structures, 16−20 the demonstrations have been essentially limited to the single-device level (either from standalone devices or from arrays in which all nonselected devices were kept in the off-state), and actual array-level operations where many cells are written then read out together have remained elusive. Instead of relying on an external diode as the select device, a more ideal approach is to take advantage of the inherent nonlinear current−voltage (I−V) characteristics obtained in some resistive switches themselves to break the sneak current paths. 21−24 Here we demonstrate that fully operational crossbar arrays that do not require external transistor or diode select devices can indeed be built by employing switching elements with inherently nonlinear I−V characteristics. The transistor-and diode-less crossbar arrays can be readily stacked on top of each other to further maximize the density advantage offered by the nanoscale devices. 4 Furthermore, by eliminating the requirement of having an external select device at each crosspoint, this approach significantly simplifies the array fabrication processes and enables the array to be completed at low temperature and directly integrated on top of underlying CMOS circuits. In this demonstration, the CMOS circuits provide peripheral functionality, such as address decoding, to complement the data storage functionalities of the crossbar array. A new programming scheme is also developed to control the device on-resistance and allow for multilevel storage in the array. The device structure studied here consists of a W/SiGe stack, an amorphous Si (a-Si) layer, and a Ag layer acting as the bottom electrode, the switching medium, and the top electrode, respectively. The thickness of each layer was carefully designed for arrays of 50 nm half pitch. To prevent CMOS degradation in this back-end-of-line (BEOL) approach, the maximum