Microvisor: A runtime architecture for thermal management in chip multiprocessors

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Abstract

In today's high performance computing environment, power density issues are at the forefront of design constraints. Many platforms integrate a diverse set of processing cores on the same die to fit small form factors. Due to the design limitations of using expensive cooling solutions, such complex chip multiprocessors require an architectural solution to mitigate thermal problems. Many of the current systems deploy voltage/frequency scaling to address thermal emergencies, either within the operating system or in hardware. These techniques have certain limitations in terms of response lag, scalability, cost and being reactive. In this paper, we present an alternative thermal management system to address these limitations, based on virtual machine concept that uses a runtime layer of software (microvisor) to manage the computational demands of threads to the thermal constraints of cores. Our results show that a predictive, targeted, and localized response to thermal events improves performance by an average of 21% over counterpart operating system and hardware control theoretic implementations. © 2011 Springer-Verlag Berlin Heidelberg.

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APA

Khan, O., & Kundu, S. (2011). Microvisor: A runtime architecture for thermal management in chip multiprocessors. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 6760 LNCS, pp. 84–110). Springer Verlag. https://doi.org/10.1007/978-3-642-24568-8_5

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