Superior Performance of Gate Workfunction and Gate Dielectric Engineered Trapezoidal FinFET in the Presence of Trap Charges

Abstract

In this paper, an analytical model has been developed to study the impact of dual material gate design and gate dielectric engineering on Trapezoidal FinFET for achieving improved device performance even in the presence of trap charges. In order to study the characteristics, Poisson’s equation has been solved by employing suitable boundary conditions. It is demonstrated that the device offers improved reliability in presence of trap charges and exhibits excellent immunity to short channel effects.