Common Source Amplifier and Ring Oscillator Circuit Performance Optimization Using Multi-Bridge Channel FETs

Abstract

In this paper the DC, analog/RF device and circuit applications of nanosheet (NS) FET is performed. To enhance power performance co-optimization geometry parameters like NS width (NS W ) and NS thickness (NS H ) are varied for high performance (HP) and low power (LP) applications. A rise in 1.47x in I ON and a rise of 5.8x in I OFF is noticed with increase in NS H due to enlarged effective width ( W eff ). In addition, a rise of 3.8x in I ON and a fall of 76.4% in I OFF is noticed with higher NS W . Larger the NS W ensures better transconductance (g m ), transconductance generation factor (TGF), cut-off frequency ( f T ), gain-band width product (GBW), transconductance frequency product (TFP), and intrinsic delay ( τ ). The optimized supply voltage ( V DD ) for maximum voltage gain of common source (CS) amplifier and 3 stage ring oscillators (RO) with varied NS W is performed. Moreover, the impact of number of stages (N) of 3 stage RO for better frequency of oscillations ( f OSC ) is studied towards high frequency circuit applications.