Low-Power design of a functional unit for arithmetic in finite fields GF(p) and GF(2m)

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Abstract

Recent multi-application smart cards are equipped with powerful 32-bit RISC cores clocked at 33 MHz or even more. They are able to support a variety of public-key cryptosystems, including elliptic curve systems over prime fields GF(p) and binary fields GF(2m) of arbitrary order. This flexibility is achieved by implementing the cryptographic primitives in software and taking advantage of dedicated instruction set extensions along with special functional units for low-level arithmetic operations. In this paper, we present the design of a low-power multiply/accumulate (MAC) unit for efficient arithmetic in finite fields. The MAC unit combines integer arithmetic and polynomial arithmetic into a single functional unit which can be configured at runtime to serve both types of fields, GF(p) and GF(2m). Our experimental results show that a properly designed unified (dual-field) multiplier consumes significantly less power in polynomial mode than in integer mode. © Springer-Verlag 2004.

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APA

Großschädl, J., & Kamendje, G. A. (2004). Low-Power design of a functional unit for arithmetic in finite fields GF(p) and GF(2m). Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2908, 227–243. https://doi.org/10.1007/978-3-540-24591-9_18

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