Design and analysis of a new multi-level inverter topology with a reduced number of switches and controlled by PDPWM technique

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Abstract

With their many advantages, including low power dissipation in power switches, low harmonic content, and reduced electromagnetic interference (EMI) from the inverter, multilevel converter (MLI) topologies are becoming more and more in demand in high and medium power applications. This paper introduces a novel multi-level symmetric inverter topology with adopted control. The objectives of this article are to architecturally define the positions of the various switches, to choose the right switches and to propose an inverter control strategy that will eliminate harmonics while producing the ideal output voltage/current. By using fewer switching elements, fewer voltage sources, and switches with a total harmonic content (THD) which reduces losses and a drop in minimum voltage (Vstrssj), the proposed topology is more efficient than conventional inverters with the same number of levels. The new topology will be demonstrated using a seven-level single-phase inverter. For various modulation indices, MATLAB-SIMULINK is used to study and validate the topology.

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Chakir, F., El Magri, A., Lajouad, R., Kissaoui, M., Chakir, M., & Bouattane, O. (2023). Design and analysis of a new multi-level inverter topology with a reduced number of switches and controlled by PDPWM technique. International Journal of Electrical and Computer Engineering Systems, 14(5), 593–600. https://doi.org/10.32985/ijeces.14.5.11

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