Fabrication of ultra-thin chips using silicon wafers with buried cavities

Abstract

In this chapter the recently introduced Chipfilm™ technology is presented. In contrast to subtractive wafer thinning techniques this technology is inherently additive, allowing for excellent control of extremely small chip thickness through epitaxial growth and for reuse of the wafer substrate. The thickness of the chips is essentially identical to the thickness of the epitaxy layer. Therefore, process cost decreases withsmaller chip thickness, while the opposite trend applies to the conventional thinning concepts. The technology consists of a pre-process module Chipfilm™, in which wafer substrates with buried cavities in the chip areas are prepared, and a minimum complexity post-process module Pick, Crack&Place™ for singulation and assembly of the ultra-thin chips. The feasibility of Chipfilm™ technology is demonstrated for 20-μm thin chips mounted and interconnected on foil and exposed to tensile stress through bending to radii down to 20 mm. The device parameters and parameter statistical variations are well comparable to those achieved on bulk wafers for the given 0.8-μm CMOS technology. © 2011 Springer Science+Business Media, LLC.