Many applications can be modeled as subgraph isomorphism problems. However, this problem is generally NP-complete and difficult to compute. A custom computing circuit is a prospective solution for such problems. This paper examines various accelerator designs, and compares them quantitatively from two points of view: cost and performance. An algorithm that is suited for hardware implementation is also proposed. The hardware for the proposed algorithm is much smaller on logic scale, and operates at a higher frequency than Ullmann’s design. The prototype accelerator operates at 16.5MHz on a Lucent ORCA 2C15A, which outperforms the software implementation of Ullmann’s algorithm on a 400 MHz Pentium II.
CITATION STYLE
Ichikawa, S., Saito, H., Udorn, L., & Konishi, K. (2000). Evaluation of accelerator designs for subgraph isomorphism problem. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 1896, pp. 729–738). Springer Verlag. https://doi.org/10.1007/3-540-44614-1_77
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