Minimalism of software implementation: Extensive performance analysis of symmetric primitives on the RL78 microcontroller

Abstract

This paper studies state-of-the-art software implementation of lightweight symmetric primitives from embedded system programmer's standpoint. In embedded environments, due to many possible variations of ROM/RAM-size combinations, it is not always easy to obtain an entire performance picture of a given primitive and to create a fair benchmark from top speed records. In this study we classify these size combinations into several categories and optimize operation speed in each category. We implemented on Renesas' RL78 microcontroller - a typical CISC embedded processor, four block ciphers and seven hash functions with various combinations of ROM and RAM sizes to make performance characteristics of these primitives clearer. We also discuss how to create an interface and measure size and speed of a given primitive from a practical point of view. As a result, our AES encryption codes run at as fast as 3,855 cycles/block in the ROM-1KB RAM-64B category, and 6,622 cycles/block in the ROM-512B RAM-128B category. For another examples aiming at minimizing a ROM size, we have achieved 453-byte Keccak, 396-byte Skein-256 and 210-byte PRESENT encryption codes on this processor. © 2014 Springer-Verlag.