Thin film polycrystalline CdTe-based solar cells are promising devices for solar applications due to their low production costs and high theoretical efficiency (~30%). However, the highest thin film CdTe laboratory cell efficiency is 21.5%, and the best CdTe module efficiency is 17.5%, which are well below the theoretical efficiency [1]. CdTe solar cell devices typically utilize a p-type CdTe absorber layer junctioned with a thin (~50-100 nm) n-type CdS window layer (~2.4 eV band gap) [2]. A photoactive CdTe x S 1-x alloy layer forms at the interface region, which could enhance the photocurrent in the long wavelength regime due to bowing effects [3]. However, S diffusion into CdTe is limited due to the large lattice mismatch between CdS and CdTe, and there is not enough S diffusion to be effective in increasing the photocurrent [4]. On the other hand, Se can easily diffuse into the CdTe layer due to the relatively close lattice constants of CdTe and CdSe. Therefore, CdTe solar cell devices have been fabricated with a CdSe (~1.7 eV band gap) window layer to enhance the short-circuit current (J SC) by increasing the photocurrent for long wavelength photons. To optimize the device, CdTe has been grown on 50, 100, 200, and 400 nm CdSe layers. External quantum efficiency (EQE) data for samples grown with CdSe layers between 50 and 200 nm show improved photocurrent in both the short and long wavelength regimes compared to CdS/CdTe devices, which drastically improves the J SC [4]. However, devices with a CdSe layer greater than 400 nm have a significantly reduced photocurrent for short wavelength photons, reducing the J SC. To better understand the role of the CdSe layer and Se diffusion on device performance, a series of atom probe tomography (APT), SEM-based electron beam induced current (EBIC), and STEM EDS measurements were performed on these devices. The EBIC measurements, shown in Fig. 1, were performed using a 3 kV, ~20 pA electron beam in a Hitachi S4800 CFEG SEM equipped with a Gatan EBIC system, and include EBIC images for devices with a 100 and 400 nm thick CdSe layer. There is a clear, strong EBIC signal throughout the entire CdTe layer for both samples. However, on closer inspection of the thin conducting oxide (TCO)/CdSe/CdTe interface, there are clear differences between the EBIC and SEM images for these samples. Each layer can be distinguished in the secondary electron (SE) image for the 400 nm thick CdSe sample, while there is no evidence for the presence of a CdSe layer in the SE image for the 100 nm thick CdSe sample. Despite not having a clear CdSe junction layer, the 100 nm sample shows a peak EBIC current at the TCO interface, while the 400 nm sample shows little to no EBIC signal at the TCO interface. To better understand the CdSe/CdTe interface, APT needles were prepared at the TCO/CdSe/CdTe interface region. The reconstructed APT data for devices with 400 and 100 nm thick CdSe layers are shown in Fig. 2a and 2b, respectively. These APT data show that Te and Se atoms easily diffuse between the CdSe and CdTe layers to form a CdSe 1-x Te x alloy interface layer with x changing with respect to distance away from the interface. There are obvious Te-and Se-rich phases within the originally deposited CdSe layer, with an overall composition of 25% Te and 25% Se for the 100 nm CdSe layer. However, the 400 nm thick CdSe layer device shows a distinct interface between the CdTe and CdSe layers, with a 35% Se-rich phase. A comparison of the APT data with the EBIC images suggests that the large-grained
CITATION STYLE
Poplawsky, J. D., Paudel, N. R., Ng, A., More, K., & Yan, Y. (2015). CdSe1_xTex Phase Segregation in CdSe/CdTe Based Solar Cells. Microscopy and Microanalysis, 21(S3), 691–692. https://doi.org/10.1017/s1431927615004250
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