Model Order Reduction of Integrated Circuits in Electrical Networks

Abstract

We consider integrated circuits with semiconductors modeled by modified nodal analysis and drift-diffusion equations. The drift-diffusion equations are discretized in space using mixed finite element method. This discretization yields a high-dimensional differential-algebraic equation. Balancing-related model reduction is used to reduce the dimension of the decoupled linear network equations, while the semidiscretized semiconductor models are reduced using proper orthogonal decomposition. We among other things show that this approach delivers reduced-order models which depend on the location of the semiconductor in the network. Since the computational complexity of the reduced-order models through the nonlinearity of the drift-diffusion equations still depend on the number of variables of the full model, we apply the discrete empirical interpolation method to further reduce the computational complexity. We provide numerical comparisons which demonstrate the performance of the presented model reduction approach. We compare reduced and fine models and give numerical results for a basic network with one diode. Furthermore we discuss residual based sampling to construct POD models which are valid over certain parameter ranges.