LLVM RISC-V RV32X Graphics Extension Support and Characteristics Analysis of Graphics Programs

Abstract

In recent years, virtual reality technology has become the dominant means of human-computer interaction, with computer graphics rendering technology being a crucial component in realizing virtual reality experiences. Rendering technology is an interdisciplinary field that encompasses various disciplines, including computer science, mathematics, and physics. Consequently, it faces challenges when it comes to designing graphics rendering processors and graphics extension instruction sets based on the RISC-V architecture. This paper utilizes the LLVM compiler to design support for RISC-V RV32X graphics extension instructions, encompassing both assembly-level and compilation-level support. It compiles the graphics rendering program in conjunction with the compilation tool chain. Feature extraction of the graphics rendering program is performed using script and feature analysis tools. The microarchitecture independent characteristics of the graphics rendering programs on the RISC-V architecture, X86 architecture, and ARM architecture are compared and analyzed at both the instruction level and memory level. The experimental results demonstrate that the RISC-V ray tracing test program exhibits higher instruction-level parallelism compared to the X86 ray tracing program, but lower than the ARM ray tracing program. Moreover, in terms of instruction mix, the proportion of arithmetic instructions in the RISC-V ray tracing test program is higher than that in the X86 ray tracing program but lower than that in the ARM ray tracing program. The proportion of memory access instructions in the RISC-V ray tracing test program is higher than that in the X86 ray tracing program, while lower than that in the ARM ray tracing program. Additionally, the RISC-V ray tracing test program exhibits relatively short memory reuse distance, enabling efficient data reuse in registers and reducing the need for frequent memory access.