Application of improved software phase-locked-loop in DSTATCOM

Abstract

In the algorithm of instantaneous reactive power theory (IP-IQ), the rotation angle of the synchronous rotating coordinate system is an important parameter that has to be supervised in real time. In this paper, we propose an improved software phase-lock-loop (SPLL) that accurately lock of the rotation angle of the fundamental positive sequence component in the unbalance grid voltage by establishing a virtual symmetrical three-phase system and then calculate the compensation current components. In this paper, we introduce a new structure of the traditional Distribution Static Synchronous Compensator (DSTAT-COM) main circuit, which considered as a combination of the conventional DSTATCOM topology with a capacitor Cf in series and the surfacing inductance. However, unlike the traditional DSTATCOM DC-Link that requires a fairly high DC voltage along with the high switching losses, the series capacitor reduces DC-Link voltage significantly, in the meanwhile compensates the reactive power required by the load without compromising DSTATCOM performance. Finally, a simulation study has been carried out by the author using Simulink to verify the proposed topology.