A high speed ATM/IP switch fabric using distributed scheduler

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Abstract

An increasing number of high performance IP routers, LANs and Asynchronous Transfer Mode (ATM) switches use crossbar switches in their backplanes. Most of these systems use input queuing to store packets. Obviously, we will encounter Head of Line (HoL) blocking in input queues which decrease throughput to 56.8% under uniform traffic. In this paper, we develop a switch fabric with 16-input/output ports using crossbar architecture with internal partitioned memory in the feedback path. Our design also uses virtual output queuing (VOQ) with adaptive intelligent scheduling in each input port. The system distributes the scheduling algorithm to reach higher aggregated throughput. The switch fabric is internally non-blocking and avoids HoL by using VOQs. It is shown in the paper that its throughput and delay are very well compared to the current high performance switch fabrics. The architecture supports full Multicasting. By using bit-slicing the total capacity of the switch can be extended to 640 Gb/s. Distributed scheduling well maximizes the capacity and processing speed of the switch. Simulation results show that it is possible to reach 100% throughput with our design. © Springer-Verlag Berlin Heidelberg 2003.

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APA

Zareh Bidoki, A. M., Yazdani, N., Azhari, S. V., & Samadian-Barzoki, S. (2003). A high speed ATM/IP switch fabric using distributed scheduler. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2662, 66–75. https://doi.org/10.1007/978-3-540-45235-5_7

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