Hardware implementation of P1-TS fuzzy rule-based systems on FPGA

Abstract

This paper presents an FPGA hardware implementation of a special case of the fuzzy rule-based system, called P1-TS. The novelty of this work is recursive hardware architecture. The recursive implementation of the rule-based system allows us to build a versatile digital circuit for which FPGA logic resources requirements are small and independent on the number of input variables. The number of inputs is only limited by the capacity of the memory that stores the consequents of the rules. In our implementation, increasing the number of variables by 1 approximately doubles calculation time of the hardware device. We use floating-point arithmetic which ensures a higher dynamic range and makes that there is no need to focus on normalizing variables values to fixed word length. © 2013 Springer-Verlag.